I think it’s time for an update on the project, in the pass weeks I had time to solder all the connections for the chips. I decided to add a ZIF connector for the flash chip since I’ll need to swap it often to upload a new code. My biggest concern I have is interference between lines here’s the back of the board now:

I tested the address, data and control lines continuity with a multimeter from chip to chip to make sure that I had no missing connection then I decided to add a power on reset circuit for convenience, I chose to go with this design:

For this prototype I decided to use the Zilog KIO chip as the clock generator. I chose a 7.3728Mhz crystal connected to the XTALI and XTALO pins with two 30pf ceramic capacitors connected to ground. I’d to bridge the CLKOUT and the CLOCK pins together since this will be my main clock signal for the rest of the system. Lastly, I connected the clock to the RxCA, TxCA, RxCB and TxCB for the two serial interface on the KIO.

One thing to keep in mind is that the KIO is dividing the clock of the crystal by 2, so the clock signal at the CLKOUT pin is 3.6864Mhz and not 7.3728Mhz. This is fine for this prototype since the goal isn’t to have a fast system but to be stable to develop the code on, here’s the clock lines highlighted in red:

Now I have to learn assembly to make it do something useful, I’ll do more update along the way.

The schematic for this project can be found on my ZoniX Github page